14" COMPUTER ORGANIZATION AND DESIGN The Hardware/Software Interface Chapter 1 Computer Abstractions and Technology The Computer Revolution Progress in computer technology ■ Underpinned by Moore's Law Makes novel applications feasible ■ Computers in automobiles ■ Cell phones ■ Human genome project . World Wide Web ■ Search Engines Computers are pervasive M 14 Chapter 1 — Computer Abstractions and Technology — Classes of Computers Desktop computers ■ General purpose, variety of software ■ Subject to cost/performance tradeoff Server computers ■ Network based ■ High capacity, performance, reliability ■ Range from small servers to building sized Embedded computers ■ Hidden as components of systems ■ Stringent power/performance/cost constraints M 14 Chapter 1 — Computer Abstractions and Technology — 3 The Processor Market 1200 1100 -1000 -900 -800 700 500 400 300 200 100 0 Cell Phones □ PCs □ TVs --1 I—1 1 1 H <# <# c?° c?N # # c£ M 14 Chapter 1 — Computer Abstractions and Technology — 4 What You Will Learn How programs are translated into the machine language ■ And how the hardware executes them The hardware/software interface What determines program performance ■ And how it can be improved How hardware designers improve performance What is parallel processing ® Chapter 1 — Computer Abstractions and Technology — 5 Understanding Performance Algorithm ■ Determines number of operations executed Programming language, compiler, architecture ■ Determine number of machine instructions executed per operation Processor and memory system ■ Determine how fast instructions are executed I/O system (including OS) ■ Determines how fast I/O operations are executed M 14 Chapter 1 — Computer Abstractions and Technology — 6 Below Your Program Application software ■ Written in high-level language System software ■ Compiler: translates HLL code to machine code ■ Operating System: service code > Handling input/output Managing memory and storage > Scheduling tasks & sharing resources Hardware ■ Processor, memory, I/O controllers 4 Chapter 1 — Computer Abstractions and Technology — Levels of Program Code High-level language ■ Level of abstraction closer to problem domain ■ Provides for productivity and portability Assembly language ■ Textual representation of instructions Hardware representation ■ Binary digits (bits) ■ Encoded instructions and data 4 High-level language program (inC) Assembly language program (for MIPS) swa pďnt v [ ], i nt k) i i nt temp; temp = v[k]; v[k] = v[k+l]; v[k+l] = temp; 1 swap: muh add 1 w 1 w sw sw j r $2 , $2 , $15, $16, $16, $15, $31 $5,4 $4,$2 0($2) 4($2) 0($2) 4($2) Binary machine language program (for MIPS) 00000000101000010000000000011000 00000000000110000001100000100001 10001100011000100000000000000000 10001100111100100000000000000100 10101100111100100000000000000000 10101100011000100000000000000100 00000011111000000000000000001000 Chapter 1 — Computer Abstractions and Technology — 8 Components of a Computer The BIG Picture Same components for all kinds of computer ■ Desktop, server, embedded Input/output includes ■ User-interface devices > Display, keyboard, mouse ■ Storage devices - Hard disk, CD/DVD, flash ■ Network adapters > For communicating with other computers Chapter 1 — Computer Abstractions and Technology — Anatomy of a Computer M 14 Chapter 1 — Computer Abstractions and Technology — 10 Anatomy of a Mouse Optical mouse ■ LED illuminates desktop ■ Small low-res camera ■ Basic image processor > Looks for x, y movement ■ Buttons & wheel Supersedes roller-ball mechanical mouse M 14 Chapter 1 — Computer Abstractions and Technology — 11 Through the Looking Glass LCD screen: picture elements (pixels) ■ Mirrors content of frame buffer memory Frame buffer Raster scan CRT display X0 Xi X0 X1 M 14 Chapter 1 — Computer Abstractions and Technology — 12 Opening the Box 3498504545^030 Inside the Processor (CPU) ■ Datapath: performs operations on data ■ Control: sequences datapath, memory, ... ■ Cache memory ■ Small fast SRAM memory for immediate access to data M 14 Chapter 1 — Computer Abstractions and Technology — 14 Inside the Processor AMD Barcelona: 4 processor cores Chapter 1 — Computer Abstractions and Technology — 15 Abstractions The BIG Picture ■ Abstraction helps us deal with complexity ■ Hide lower-level detail I ■ Instruction set architecture (ISA) ■ The hardware/software interface ■ Application binary interface ■ The ISA plus system software interface ■ Implementation ■ The details underlying and interface Chapter 1 — Computer Abstractions and Technology — 16 A Safe Place for Data Volatile main memory ■ Loses instructions and data when power off Non-volatile secondary memory ■ Magnetic disk Networks ■ Communication and resource sharing ■ Local area network (LAN): Ethernet ■ Within a building ' ■ Wide area network (WAN: the Internet ■ Wireless network: WiFi, Bluetooth M 14 Chapter 1 — Computer Abstractions and Technology — 18 Technology Trends Electronics technology continues to evolve ■ Increased capacity and performance ■ Reduced cost 1976 1978 1980 1982 1984 1986 1988 1990 1992 1994 1996 1998 2000 2002 2004 2006 2008 Year of introduction DRAM capacity Year Technology Relative performance/cost 1951 Vacuum tube 1 1965 Transistor 35 1975 Integrated circuit (IC) 900 1995 Very large scale IC (VLSI) 2,400,000 2005 Ultra large scale IC 6,200,000,000 Chapter 1 — Computer Abstractions and Technology — 19 Defining Performance ■ Which airplane has the best performance? Boeing 777 Boeing 747 BAC/Sud Concorde Douglas DC-8-50 100 200 300 400 500 ■ Passenger Capacity Boeing 777 Boeing 747 BAC/Sud Concorde Douglas DC-8-50 500 1000 1500 ■ Cruising Speed (mph) Boeing 777 Boeing 747 BAC/Sud Concorde Douglas DC-8-50 2000 4000 6000 8000 10000 ■ Cruising Range (miles) Boeing 777 Boeing 747 BAC/Sud Concorde Douglas DC-8-50 —1—h 1 1 1 100000 200000 300000 400000 ■ Passengers x mph M 14 Chapter 1 — Computer Abstractions and Technology — 20 Response Time and Throughput Response time ■ How long it takes to do a task Throughput ■ Total work done per unit time ■ e.g., tasks/transactions/... per hour How are response time and throughput affected by ■ Replacing the processor with a faster version? ■ Adding more processors? We'll focus on response time for now... M 14 Chapter 1 — Computer Abstractions and Technology — 21 Relative Performance ■ Define Performance = 1/Execution Time "X is n time faster than Y" Performancex /PerformanceY = Execution timeY/Execution timex = n ■ Example: time taken to run a program ■ 10s on A, 15s on B ■ Execution TimeB / Execution TimeA = 15s/10s = 1.5 ■ So A is 1.5 times faster than B Chapter 1 — Computer Abstractions and Technology — 22 Measuring Execution Time Elapsed time ■ Total response time, including all aspects ■ Processing, I/O, OS overhead, idle time ■ Determines system performance CPU time ■ Time spent processing a given job Discounts I/O time, other jobs' shares ■ Comprises user CPU time and system CPU time ■ Different programs are affected differently by CPU and system performance Chapter 1 — Computer Abstractions and Technology — 23 CPU Clocking Operation of digital hardware governed by a constant-rate clock Clock (cycles) Data transfer and computation Update state Clock period- iC Ö Ö I r J: I Ö ■ Clock period: duration of a clock cycle - e.g., 250ps = 0.25ns = 250*10"12s ■ Clock frequency (rate): cycles per second . e.g., 4.0GHz = 4000MHz = 4.0*109Hz Chapter 1 — Computer Abstractions and Technology — 24 CPU Time CPU Time = CPU Clock Cyclesx Clock Cycle Time _ CPU Clock Cycles Clock Rate Performance improved by ■ Reducing number of clock cycles ■ Increasing clock rate ■ Hardware designer must often trade off clock rate against cycle count M 14 Chapter 1 — Computer Abstractions and Technology — 25 CPU Time Example Computer A: 2GHz clock, 10s CPU time Designing Computer B ■ Aim for 6s CPU time ■ Can do faster clock, but causes 1.2 * clock cycles How fast must Computer B clock be? Clock CyclesA = CPU TimeA x Clock Rate Clock Rate Clock CyclesB 1.2 x Clock Cycles A B CPU Time. 6s 10sx2GHz = 20x109 Clock Rate B 1.2x20x109 _24x109 6s ~ 6s = 4GHz M 14 ® Chapter 1 — Computer Abstractions and Technology — 26 Instruction Count and CPI Clock Cycles = Instruction Count x Cycles per Instruction CPU Time = Instruction Count x CPI x Clock Cycle Time _ Instruction Count x CPI Clock Rate ■ Instruction Count for a program ■ Determined by program, ISA and compiler ■ Average cycles per instruction ■ Determined by CPU hardware ■ If different instructions have different CPI > Average CPI affected by instruction mix Chapter 1 — Computer Abstractions and Technology — 27 CPI Example Computer A: Cycle Time = 250ps, CPI = 2.0 Computer B: Cycle Time = 500ps, CPI = 1.2 Same ISA Which is faster, and by how much? CPU Time » = Instruction Count xCPL x Cycle Time » = Ix 2.0x 250ps = Ix 500ps ■>- A is faster. CPU Timeg = Instruction Count x CPU x Cycle Time^ = lx1.2x500ps = lx600ps CPUTimeB _|x600ps CPUTimeA ~ Ix500ps = 1.2 by this much Chapter 1 — Computer Abstractions and Technology — 28 CPI in More Detail If different instruction classes take different numbers of cycles Weighted average CPI Clock Cycles n f Instruction CounO Instruction Count ' Instruction Count j CPI, x v_ _y Relative frequency M 14 Chapter 1 — Computer Abstractions and Technology — 29 CPI Example Alternative compiled code sequences using instructions in classes A, B, C Class A B c CPI for class 1 2 3 IC in sequence 1 2 1 2 IC in sequence 2 4 1 1 Sequence 1: IC = 5 ■ Clock Cycles = 2x1 + 1x2 + 2x3 = 10 . Avg. CPI = 10/5 = 2.0 Sequence 2: IC = 6 ■ Clock Cycles = 4x1 +1x2 + 1x3 = 9 . Avg. CPI = 9/6 = 1.5 Chapter 1 — Computer Abstractions and Technology — 30 Performance Summary The BIG Picture ^-...-r. Instructions Clock cycles Seconds CPU Time =-x---x Program Instruction Clock cycle Performance depends on ■ Algorithm: affects IC, possibly CPI ■ Programming language: affects IC, CPI - Compiler: affects IC, CPI ■ Instruction set architecture: affects IC, CPI, Tc Chapter 1 — Computer Abstractions and Technology — 31 Power Trends 10000 T "n 1000 X ro 100 B ro oc O o O I 9 ■4—' m ^-j Q- 5 E o ^ °J .® p In CMOS IC technology o Q. Power = Capacitive loadx Voltage2 x Frequency \l-~-1 \r~Z~:-77T1 \ x30 5V^ 1V x1000 A Chapter 1 — Computer Abstractions and Technology — 32 Reducing Power ■ Suppose a new CPU has 85% of capacitive load of old CPU 15% voltage and 15% frequency reduction Pnew Cold x 0.85 x (Vold x 0.85)2 x Fold x 0.85 = 0.85^=0.52 ■old C0,dxV0,d xF0,d The power wall ■ We can't reduce voltage further ■ We can't remove more heat How else can we improve performance? Chapter 1 — Computer Abstractions and Technology — 33 Uniprocessor Performance 10,000 1000 o CD t X CD e i— 100 10 Intel Xeon, 3.6 GHz_64-bit Intel Xeon, 3.6 GHz AMD Opteron, 2.2 GHz^^»^^ Intel Pentium 4,3.0 GHz •"^5364 4195 AMD Athlon, 1.6 GHz Intel Pentium III, 1.0 GHzV**2584 Alpha 21264A, 0.7 GHz/*1779 Alpha 21264, 0.6 GHz^><^1267 Alpha 21164, 0.6 GHz^<.-''993 Alpha 21164, 0.5 GHzjr'V''649 , .-'481 Alpha 21164, 0.3 GHz| Alpha 21064A, 0.3 GHz_, PowerPC 604, 0.1GHz, Alpha 21064, 0.2 GHz HP PA-RISC, 0.05 GHz 1978 1980 1982 2004 2006 Constrained by power, instruction-level parallelism, memory latency M 14 Chapter 1 — Computer Abstractions and Technology — 34 Multiprocessors Multicore microprocessors ■ More than one processor per chip Requires explicitly parallel programming ■ Compare with instruction level parallelism Hardware executes multiple instructions at once ■ Hidden from the programmer ■ Hard to do Programming for performance ■ Load balancing ■ Optimizing communication and synchronization ® Chapter 1 — Computer Abstractions and Technology — 35 Manufacturing ICs Silicon ingot Bond die to package Packaged dies Tested dies □ □ □ □□□□ □ □HDD DDDD D D Blank wafers Tested wafer Tested packaged dies 000 Part 000 tester D D X □ D D - 20 to 40 processing steps Patterned wafers Yield: proportion of working dies per wafer r J* Chapter 1 — Computer Abstractions and Technology — 36 AMD Opteron X2 Wafer X2: 300mm wafer, 117 chips, 90nm technology X4: 45nm technology Chapter 1 — Computer Abstractions and Technology — 37 Integrated Circuit Cost ^ . ,. Cost per wafer Cost per die =--- Dies per wafer x Yield Dies per wafer« Wafer area/Die area Yield - 1 (1 + (Defects per area x Die area/2)) ■ Nonlinear relation to area and defect rate ■ Wafer cost and area are fixed ■ Defect rate determined by manufacturing process ■ Die area determined by architecture and circuit design M 14 Chapter 1 — Computer Abstractions and Technology — 38 SPEC CPU Benchmark Programs used to measure performance ■ Supposedly typical of actual workload Standard Performance Evaluation Corp (SPEC) ■ Develops benchmarks for CPU, I/O, Web, ... SPEC CPU2006 ■ Elapsed time to execute a selection of programs > Negligible I/O, so focuses on CPU performance ■ Normalize relative to reference machine ■ Summarize as geometric mean of performance ratios . CINT2006 (integer) and CFP2006 (floating-point) M 14 ® Chapter 1 — Computer Abstractions and Technology — 39 CINT2006 for Opteron X4 2356 Name Description IC*109 CPI Tc (ns) Exec time Ref time SPECratio perl Interpreted string processing 2,118 0.75 0.40 637 9,777 15.3 bzip2 Block-sorting compression 2,389 0.85 0.40 817 9,650 11.8 gcc GNU C Compiler 1,050 1.72 0.47 24 8,050 11.1 mcf Combinatorial optimization 336 10.00 0.40 1,345 9,120 6.8 go Go game (Al) 1,658 1.09 0.40 721 10,490 14.6 hmmer Search gene sequence 2,783 0.80 0.40 890 9,330 10.5 sjeng Chess game (Al) 2,176 0.96 0.48 37 12,100 14.5 libquantum Quantum computer simulation 1,623 1.61 0.40 1,047 20,720 19.8 h264avc Video compression 3,102 0.80 0.40 993 22,130 22.3 omnetpp Discrete event simulation 587 2.94 0.40 690 6,250 9.1 astar Games/path finding 1,082 1.79 0.40 773 7,020 9.1 xalancbmk XML parsing 1,058 2.70 0.40 1,143 6,900 6.0 Geometric mean f 11.7 High cache miss rates M 14 Chapter 1 — Computer Abstractions and Technology — 40 SPEC Power Benchmark Power consumption of server at different workload levels ■ Performance: ssj_ops/sec ■ Power: Watts (Joules/sec) Chapter 1 — Computer Abstractions and Technology — 41 SPECpower_ssj2008 for X4 Target Load % Performance (ssj_ops/sec) Average Power (Watts) 100% 231,867 295 90% 211,282 286 80% 185,803 275 70% 163,427 265 60% 140,160 256 50% 118,324 246 40% 920,35 233 30% 70,500 222 20% 47,126 206 10% 23,066 180 0% 0 141 Overall sum 1,283,590 2,605 £ssj_ops/ Xpower 493 M 14 Chapter 1 — Computer Abstractions and Technology Pitfall: Amdahl's Law Improving an aspect of a computer and expecting a proportional improvement in overall performance Taffected _|_ "y improved ■ j. r j. unaffected y improvement factor Example: multiply accounts for 80s/100s ■ How much improvement in multiply performance to get 5* overall? on 20 = —- + 20 ■ Can't be done! n Corollary: make the common case fast Chapter 1 — Computer Abstractions and Technology — Fallacy: Low Power at Idle Look back at X4 power benchmark . At 100% load: 295W . At 50% load: 246W (83%) . At 10% load: 180W (61%) Google data center ■ Mostly operates at 10% - 50% load - At 100% load less than 1% of the time Consider designing processors to make power proportional to load M 14 Chapter 1 — Computer Abstractions and Technology — 44 Pitfall: MIPS as a Performance Metric MIPS: Millions of Instructions Per Second ■ Doesn't account for ■ Differences in ISAs between computers Differences in complexity between instructions ...^ Instruction count MIPS = Execution timexlO Instruction count Clock rate Instruction count x CPI ^ ^ q6 CPIx 106 Clock rate CPI varies between programs on a given CPU 4 Chapter 1 — Computer Abstractions and Technology — 45 Concluding Remarks Cost/performance is improving ■ Due to underlying technology development Hierarchical layers of abstraction ■ In both hardware and software Instruction set architecture ■ The hardware/software interface Execution time: the best performance measure Power is a limiting factor ■ Use parallelism to improve performance Chapter 1 — Computer Abstractions and Technology — Exercise 1 The following table shows the number of instructions for a program. Arith Store Load Branch Total 500 50 100 50 700 Assuming that arith instructions take 1 cycle, load and store 5 cycles and branch 2 cycles, what is the execution time of the program in a 2 GHz processor? Find the CPI for the program. M 14 Chapter 1 — Computer Abstractions and Technology — 47 Exercise 2 Consider two different implementations of the same instruction set architecture, P1 and P2. Processor P1 runs on a clock rate of 1.5 GHz and P2 runs on 2.0 GHz. There are four classes of instructions, A, B, C, and D. The CPIs of each implementation are given in the following table. Class A Class B Class C Class D CPIs of P1 1 2 3 4 CPIs of P2 2 2 2 2 Frequency 10% 10% 50% 30% Given a program with 106 instructions divided into the four classes according to the frequencies in the above table, which implementation is faster? How much? M 14 Chapter 1 — Computer Abstractions and Technology — 48