Computer Organization and Design /fj^ The Hardware/Software Interface Chapter 3 Arithmetic for Computers Arithmetic for Computers Operations on integers ■ Addition and subtraction ■ Multiplication and division ■ Dealing with overflow Floating-point real numbers ■ Representation and operations M 14 Chapter 3 — Arithmetic for Computers Integer Addition Example: 7 + 6 0 (Carries) ■■■ (0) 0 (0) 0 (0) 1 (1) 1 (1) 0 (0) 1 Overflow if result out of range ■ Adding +ve and -ve operands, no overflow ■ Adding two +ve operands Overflow if result sign is 1 ■ Adding two -ve operands Overflow if result sign is 0 M 14 ® Chapter 3 — Arithmetic for Computers Integer Subtraction Add negation of second operand Example: 7-6 = 7 + (-6) +7: 0000 0000 ... 0000 0111 -6: 1111 1111 ... 1111 1010 +1: 0000 0000 ... 0000 0001 ■ Overflow if result out of range ■ Subtracting two +ve or two -ve operands, no overflow ■ Subtracting +ve from -ve operand > Overflow if result sign is 0 ■ Subtracting -ve from +ve operand Overflow if result sign is 1 M 14 Chapter 3 — Arithmetic for Computers — 4 Dealing with Overflow Some languages (e.g., C) ignore overflow ■ Use MIPS addu, addui, subu instructions Other languages (e.g., Ada, Fortran) require raising an exception ■ Use MIPS add, addi, sub instructions ■ On overflow, invoke exception handler ■ Save PC in exception program counter (EPC) register ■ Jump to predefined handler address mf cO (move from coprocessor reg) instruction can retrieve EPC value, to return after corrective action M 14 Chapter 3 — Arithmetic for Computers — 5 Arithmetic for Multimedia Graphics and media processing operates on vectors of 8-bit and 16-bit data ■ Use 64-bit adder, with partitioned carry chain Operate on 8*8-bit, 4x16-bit, or 2*32-bit vectors ■ SIMD (single-instruction, multiple-data) Saturating operations ■ On overflow, result is largest representable value c.f. 2s-complement modulo arithmetic ■ E.g., clipping in audio, saturation in video Chapter 3 — Arithmetic for Computers — 6 Multiplication ■ Start with long-multiplication approach multiplicand multiplier product 1000 >T» 1001 1000 0000 0000 1000 1001000 Length of product is the sum of operand lengths Multiplicand Shift left 64-bit ALU 64 bits Product Write 64 bits Multiplier Shift right 1 32 bits - M 14 Chapter 3 — Arithmetic for Computers — 7 Multiplication Hardware Q Start J Multiplicand Shift left 64 bits Product Write Multiplier Shift right 32 bits - 64 bits ( Done ) Initially 0 M 14 Chapter 3 — Arithmetic for Computers — Optimized Multiplier Perform steps in parallel: add/shift Multiplicand 1 32 bits 32-bit ALU Product Shift right Write 64 bits One cycle per partial-product addition ■ That's ok, if frequency of multiplications is low Chapter 3 — Arithmetic for Computers — 9 Faster Multiplier Uses multiple adders ■ Cost/performance tradeoff Mplier31 • Mcand Mplier30 • Mcand Mplier29 « Mcand Mplier28 • Mcand Mplier3 • Mcand Mplier2 • Mcand Mplierl • Mcand MplierO • Mcand 1 bit' 32 bits 32 bits 32 bits 32 bits 1 bit — 32 bits 32 bits 1 bit- Product63 Product62 32 bits Product47..16 1 bit- Productl ProductO Can be pipelined ■ Several multiplication performed in parallel Chapter 3 —Arithmetic for Computers — 10 MIPS Multiplication Two 32-bit registers for product ■ HI: most-significant 32 bits ■ LO: least-significant 32-bits Instructions ■ mult rs, rt / multu rs, rt . 64-bit product in HI/LO ■ mfhi rd / mflo rd . Move from HI/LO to rd Can test HI value to see if product overflows 32 bits ■ mul rd, rs, rt Least-significant 32 bits of product -> rd M 14 Chapter 3 —Arithmetic for Computers — 11 Division quotient dividend divisor 1001 1000J1001010 / -1000 10 101 1010 -1000 —► 10 remainder n-bit operands yield n-bit quotient and remainder Check for 0 divisor Long division approach ■ If divisor < dividend bits 1 bit in quotient, subtract ■ Otherwise 0 bit in quotient, bring down next dividend bit Restoring division ■ Do the subtract, and if remainder goes < 0, add divisor back Signed division ■ Divide using absolute values ■ Adjust sign of quotient and remainder as required M 14 Chapter 3 —Arithmetic for Computers — 12 Division Hardware Start J 1. Subtract the Divisor register from the Remainder register and place the result in the Remainder register Remainder > 0 / \. Remainder < 0 vTest Remainder. 2a. Shift the Quotient register to the left, setting the new rightmost bit to 1 2b. Restore the original value by adding the Divisor register to the Remainder register and placing the sum in the Remainder register. Also shift the Quotient register to the left, setting the new least significant bit to 0 3. Shift the Divisor register right 1 bit No: < 33 repetitions Yes: 33 repetitions A Q Done ^ Initially divisor in left half Divisor Shift right 64 bits 64-bit ALU Remainder Write 64 bits Quotient Shift left M— 32 bits Initially dividend Chapter 3 —Arithmetic for Computers — 13 Optimized Divider Divisor 1 32 bits r Rems Shift right linder Shift left Write 64 bits One cycle per partial-remainder subtraction Looks a lot like a multiplier! ■ Same hardware can be used for both Chapter 3 — Arithmetic for Computers — 14 Faster Division Can't use parallel hardware as in multiplier ■ Subtraction is conditional on sign of remainder Faster dividers (e.g. SRT devision) generate multiple quotient bits per step ■ Still require multiple steps M 14 Chapter 3 —Arithmetic for Computers — 15 MIPS Division Use HI/LO registers for result ■ HI: 32-bit remainder . LO: 32-bit quotient Instructions ■ div rs, rt / divu rs, rt ■ No overflow or divide-by-0 checking Software must perform checks if required ■ Use mf hi, mf 1 o to access result M 14 Chapter 3 —Arithmetic for Computers — 16 Floating Point Representation for non-integral numbers ■ Including very small and very large numbers Like scientific notation . +0.002 x 10-4 «---1—-- ^^^^^^ not norm . +987.02 x 109 * - ■ In binary ■ ±i.xxxxxxx2 x 2yyyy ■ Types f 1 oat and doubl e in C . -2.34 x 1056 normalized M 14 Chapter 3 — Arithmetic for Computers — Floating Point Standard . Defined by IEEE Std 754-1985 ■ Developed in response to divergence of representations ■ Portability issues for scientific code ■ Now almost universally adopted ■ Two representations ■ Single precision (32-bit) ■ Double precision (64-bit) M 14 Chapter 3 —Arithmetic for Computers — 18 IEEE Floating-Point Format single: 8 bits single: 23 bits double: 11 bits double: 52 bits Exponent Fraction x = (-1 )s x (1 + Fraction)x 2(ExponentBias) S: sign bit (0 =^> non-negative, 1 =^> negative) Normalize significand: 1.0 < |significand| < 2.0 ■ Always has a leading pre-binary-point 1 bit, so no need to represent it explicitly (hidden bit) ■ Significand is Fraction with the "1." restored Exponent: excess representation: actual exponent + Bias ■ Ensures exponent is unsigned - Single: Bias = 127; Double: Bias = 1203 4 Chapter 3 —Arithmetic for Computers — 19 Single-Precision Range Exponents 00000000 and 11111111 reserved Smallest value - Exponent: 00000001 => actual exponent = 1 - 127 = -126 Fraction: 000...00 => significand = 1.0 - ±1.0 x 2"126«±1.2 x 10-38 Largest value ■ exponent: 11111110 =^> actual exponent = 254 - 127 = +127 Fraction: 111... 11 => significand « 2.0 . ±2.0 x 2+127«±3.4 x 10+38 Chapter 3 — Arithmetic for Computers — 20 Double-Precision Range Exponents 0000... 00 and 1111... 11 reserved Smallest value - Exponent: 00000000001 =^> actual exponent = 1 -1023 = -1022 Fraction: 000...00 => significand = 1.0 - ±1.0 x 2-1022 « ±2.2 x 10-308 Largest value ■ Exponent: 11111111110 =^> actual exponent = 2046 - 1023 = +1023 Fraction: 111... 11 => significand « 2.0 . ±2.0 x 2+1023«±1.8 x 10+308 r e Chapter 3 — Arithmetic for Computers — 21 Floating-Point Precision Relative precision ■ all fraction bits are significant ■ Single: approx 2-23 ■ Equivalent to 23 * log102 « 23 * 0.3 ~ 6 decimal digits of precision ■ Double: approx 2-52 ■ Equivalent to 52 * log102 « 52 * 0.3 « 16 decimal digits of precision M 14 Chapter 3 — Arithmetic for Computers — 22 Floating-Point Example ■ Represent-0.75 ■ -0.75 = (-1)1 x 1.12x2-1 - S = 1 - Fraction = 1000...002 ■ Exponent = -1 + Bias . Single: -1 + 127= 126 = 011111102 . Double: -1 + 1023 = 1022 = 011111111102 > Single: 1011111101000...00 > Double: 1011111111101000...00 M 14 Chapter 3 — Arithmetic for Computers — 23 Floating-Point Example What number is represented by the single-precision float 11000000101000... 00 . S = 1 - Fraction = 01000...002 - Fxponent = 100000012 = 129 X = (-1)1 x(1 + 012) x 2(129"127) = (-1) x 1.25 x 22 = -5.0 M 14 Chapter 3 — Arithmetic for Computers — 24 Floating-Point Addition ■ Consider a 4-digit decimal example . 9.999 x 101 + 1.610 x 10~1 ■ 1. Align decimal points ■ Shift number with smaller exponent . 9.999 x 101 +0.016 x 101 ■ 2. Add significands . 9.999 x 101 + 0.016 x 101 = 10.015 x 101 ■ 3. Normalize result & check for over/underflow . 1.0015 x 102 ■ 4. Round and renormalize if necessary . 1.002 x 102 M 14 Chapter 3 — Arithmetic for Computers — 25 Floating-Point Addition ■ Now consider a 4-digit binary example . 1.0002 x 2"1 + -1.1102 x 2-2 (0.5 + -0.43 75) ■ 1. Align binary points ■ Shift number with smaller exponent . 1.0002 x 2"1 +-0.1112 x 2"1 ■ 2. Add significands . 1.0002 x 2"1 + -0.1112 x 2-1 =0.0012x2"1 ■ 3. Normalize result & check for over/underflow ■ 1.0002 x 2~*, with no over/underflow ■ 4. Round and renormalize if necessary - 1.0002 x 2-* (no change) =0.0625 M 14 Chapter 3 — Arithmetic for Computers — 26 FP Adder Hardware Much more complex than integer adder Doing it in one clock cycle would take too long ■ Much longer than integer operations ■ Slower clock would penalize all instructions FP adder usually takes several cycles ■ Can be pipelined M 14 Chapter 3 — Arithmetic for Computers — 27 FP Adder Hardware Sign Exponent I r ir Fraction t T Small ALU Sign Exponent Fraction Exponent difference C5~T> IF ir I_t Control JUL 1 Shift right 1 r Increment or decrement Big ALU M IP 11 Shift left or right Rounding hardware Sign Exponent Fraction Compare exponents Shift smaller number right Add > Step 1 Step 2 Normalize Round Step 3 Step 4 Chapter 3 — Arithmetic for Computers — 28 Exercise 1 Show the contents of the two registers of the optimized multiplication hardware shown below when multiplying X = 1001 by Y = 0110 over the 4 multiplication steps. Multiplicand 1 4 bits Product Shift right Write 8 bits 4 Chapter 3 — Arithmetic for Computers — 29 Exercise 2 What number (in decimal) is represented by the following single-precision float in the IEEE 754 format? 1 10000010 01100000000000000000000 M 14 Chapter 3 — Arithmetic for Computers — 30 Exercise 3 Represent (-2.25)10 in single-precision float in the I 754 format. The IEEE 754 single-precision format is as follows. Sign: 1 bit Exponent: 8 bits Fraction: 23 bits 4 Chapter 3 — Arithmetic for Computers — 31