BEZDĚK, Peter, Nikola BENEŠ, Ivana ČERNÁ and Jiří BARNAT. On clock-aware LTL parameter synthesis of timed automata. Journal of Logical and Algebraic Methods in Programming. ELSEVIER SCIENCE INC, 360 PARK AVE SOUTH: Elsevier, 2018, vol. 99, Oct, p. 114-142. ISSN 2352-2208. Available from: https://dx.doi.org/10.1016/j.jlamp.2018.05.004.
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Basic information
Original name On clock-aware LTL parameter synthesis of timed automata
Authors BEZDĚK, Peter (703 Slovakia, belonging to the institution), Nikola BENEŠ (203 Czech Republic, belonging to the institution), Ivana ČERNÁ (203 Czech Republic, guarantor, belonging to the institution) and Jiří BARNAT (203 Czech Republic, belonging to the institution).
Edition Journal of Logical and Algebraic Methods in Programming, ELSEVIER SCIENCE INC, 360 PARK AVE SOUTH, Elsevier, 2018, 2352-2208.
Other information
Original language English
Type of outcome Article in a journal
Field of Study 10201 Computer sciences, information science, bioinformatics
Country of publisher United States of America
Confidentiality degree is not subject to a state or trade secret
WWW URL URL URL
Impact factor Impact factor: 0.632
RIV identification code RIV/00216224:14330/18:00101069
Organization unit Faculty of Informatics
Doi http://dx.doi.org/10.1016/j.jlamp.2018.05.004
UT WoS 000437073800005
Keywords in English Parameter Synthesis; Parametric Timed Automata; Linear Temporal Logic
Tags International impact, Reviewed
Changed by Changed by: prof. RNDr. Ivana Černá, CSc., učo 1419. Changed: 13/10/2020 09:22.
Abstract
The parameter synthesis problem for timed automata is undecidable in general even for very simple reachability properties. In this paper we introduce restrictions on parameter valuations under which the parameter synthesis problem is decidable for Clock-Aware LTL properties. The investigated bounded integer parameter synthesis problem could be solved using an explicit enumeration of all possible parameter valuations. We propose an alternative symbolic zone-based method for this problem which can result in a faster computation. Our technique adapts the ideas of the automata-based approach to Clock-Aware LTL model checking of timed automata. In order to simplify the explanation of our method, we first introduce a parameter synthesis algorithm for timed automata, then we describe method for checking Clock-Aware LTL properties of timed automata and finally we combine these two methods together to provide general parameter synthesis algorithm for Clock-Aware LTL properties. To demonstrate the usefulness of our approach, we provide experimental evaluation and compare the proposed method with the explicit enumeration technique.
Links
GA18-02177S, research and development projectName: Abstrakce a jiné techniky v semi-symbolické verifikaci programů
Investor: Czech Science Foundation
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