Packet Filtering for FPGA-Based Routing Accelerator
ANTOŠ, David, Vojtěch ŘEHÁK and Petr HOLUB. Packet Filtering for FPGA-Based Routing Accelerator. In CESNET Conference 2006 Proceedings. Prague: CESNET, z. s. p. o., 2006, p. 161--173. ISBN 80-239-6533-6. |
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Basic information | |
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Original name | Packet Filtering for FPGA-Based Routing Accelerator |
Name in Czech | Filtrace paketů pro směrovací akcelerátor na bázi FPGA |
Authors | ANTOŠ, David (203 Czech Republic), Vojtěch ŘEHÁK (203 Czech Republic, guarantor) and Petr HOLUB (203 Czech Republic, belonging to the institution). |
Edition | Prague, CESNET Conference 2006 Proceedings, p. 161--173, 13 pp. 2006. |
Publisher | CESNET, z. s. p. o. |
Other information | |
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Original language | English |
Type of outcome | Proceedings paper |
Field of Study | 20206 Computer hardware and architecture |
Country of publisher | Czech Republic |
Confidentiality degree | is not subject to a state or trade secret |
WWW | URL |
RIV identification code | RIV/00216224:14610/06:00015632 |
Organization unit | Institute of Computer Science |
ISBN | 80-239-6533-6 |
UT WoS | 000271027200016 |
Keywords in English | packet filtering; hardware accelerated routing; filtring rules transformation; filtering decision diagram; binary decision diagram |
Tags | binary decision diagram, filtering decision diagram, filtring rules transformation, hardware accelerated routing, packet filtering |
Changed by | Changed by: RNDr. David Antoš, Ph.D., učo 3077. Changed: 26/7/2011 11:36. |
Abstract |
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In this paper, we present a novel approach for Binary Decision Diagram based semantically extended representation of packet filters called Filter Decision Diagrams (FDD), used for efficient filter processing and lookup in a hardware accelerator that uses a lookup engine employing CAM and comparison instructions kept in SRAM. We present the most important operations for FDDs and also give some complexity estimate. We also analyze and compare expressing power of the most commonly available packet filters. |
Abstract (in Czech) |
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Článek popisuje nový přístup k reprezentaci paketových filtrů: filtrovací rozhodovací diagramy (filtering decision diagram, FDD). Tato reprezentace je založena na sémanticky rozšířených binárních rozhodovacích diagramech a použita pro efektivní zpracování filtrů v hardwarovém akcelerátoru, který používá CAM a porovnávací instrukce ke klasifikaci paketů. Jsou prezentovány základní operace nad FDD a složitostní odhady. Analyzujeme a porovnáváme vyjadřovací schopnosti běžných paketových filtrů. |
Links | |
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GD102/05/H050, research and development project | Name: Integrovaný přístup k výchově studentů DSP v oblasti paralelních a distribuovaných systémů |
Investor: Czech Science Foundation, Integrated approach to education of PhD students in the area of parallel and distributed systems | |
MSM0021622419, plan (intention) | Name: Vysoce paralelní a distribuované výpočetní systémy |
Investor: Ministry of Education, Youth and Sports of the CR, Highly Parallel and Distributed Computing Systems | |
MSM6383917201, plan (intention) | Name: Optická síť národního výzkumu a její nové aplikace |
1M0545, research and development project | Name: Institut Teoretické Informatiky |
Investor: Ministry of Education, Youth and Sports of the CR, Institute for Theoretical Computer Science |
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