Routing and Level 2 Addressing in a Hardware Accelerator for Network Applications

ANTOŠ, David and Vojtěch ŘEHÁK. Routing and Level 2 Addressing in a Hardware Accelerator for Network Applications. In ICT 2006, 13th International Conference on Telecommunications. Funchal, Madeira: University of Aveiro, Portugal, 2006, p. 1-4. ISBN 972-98368-4-1.

Basic information

• Original name: Routing and Level 2 Addressing in a Hardware Accelerator for Network Applications
• Name in Czech: Směrování a L2 adresace v hardwarovém akcelerátoru pro síťové aplikace
• Authors: ANTOŠ, David (203 Czech Republic, guarantor) and Vojtěch ŘEHÁK (203 Czech Republic).
• Edition: Funchal, Madeira, ICT 2006, 13th International Conference on Telecommunications, p. 1-4, 4 pp. 2006.
• Publisher: University of Aveiro, Portugal

Other information

• Original language: English
• Type of outcome: Proceedings paper
• Field of Study: 20200 2.2 Electrical engineering, Electronic engineering, Information engineering
• Country of publisher: Portugal
• Confidentiality degree: is not subject to a state or trade secret
• RIV identification code: RIV/00216224:14330/06:00015335
• Organization unit: Faculty of Informatics
• ISBN: 972-98368-4-1
• Keywords in English: routing; L2 addressing; hardware acceleration
• Tags: hardware acceleration, L2 addressing, routing
• Tags: Reviewed

Abstract

Personal computers are known to be highly usable as internet routers. To overcome their throughput limitations, a hardware accelerator can be employed. For the purposes of packet classification in the accelerator, we investigate a way to combine routing, level 2 addressing, and packet filtering into a single lookup structure. This paper describes the first part of the process: a method to combine routing and level 2 addressing to a single lookup. A formal model of routing and level 2 addressing is presented and used to prove correctness of the method and its equivalence to operating system behaviour.

Abstract (in Czech)

Osobní počítač lze použít jako směrovač. Abychom obešli omezení propustnosti, lze nasadit hardwarový akcelerátor. Pro úlohu klasifikace paketů v akcelerátoru studujeme způsoby, jak zkombinovat směrování, L2 adresaci a filtraci paketů do jediné vyhledávací operace. Článek popisuje první část tohoto procesu: metodu kombinace směrovacích informací a L2 do jedné vyhledávací struktury. Prezentuje formální přístup ke směrování a L2 adresaci a vytvořený formalismus je použit k důkazu ekvivalence chování vytvořené struktury a operačního systému.

Links

• GD102/05/H050, research and development project: Name: Integrovaný přístup k výchově studentů DSP v oblasti paralelních a distribuovaných systémů

Investor: Czech Science Foundation, Integrated approach to education of PhD students in the area of parallel and distributed systems

• MSM0021622419, plan (intention): Name: Vysoce paralelní a distribuované výpočetní systémy

Investor: Ministry of Education, Youth and Sports of the CR, Highly Parallel and Distributed Computing Systems

• 1ET408050503, research and development project: Name: Techniky automatické verifikace a validace softwarových a hardwarových systémů

Investor: Academy of Sciences of the Czech Republic, Techniques for automatic verification and validation of software nad hardware systems

• 1M0545, research and development project: Name: Institut Teoretické Informatiky

Investor: Ministry of Education, Youth and Sports of the CR, Institute for Theoretical Computer Science