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@inproceedings{792977,
author = {Barnat, Jiří and Brim, Luboš},
address = {Berlin Heidelberg},
booktitle = {Leveraging Applications of Formal Methods, Verification and Validation},
keywords = {Parallel; LTL Model Checking;},
language = {eng},
location = {Berlin Heidelberg},
isbn = {978-3-540-88478-1},
pages = {604-618},
publisher = {Springer},
title = {Squeeze All the Power Out of Your Hardware to Verify Your Software!},
year = {2008}
}
TY - JOUR
ID - 792977
AU - Barnat, Jiří - Brim, Luboš
PY - 2008
TI - Squeeze All the Power Out of Your Hardware to Verify Your Software!
PB - Springer
CY - Berlin Heidelberg
SN - 9783540884781
KW - Parallel
KW - LTL Model Checking;
N2 - The computer industry is undergoing a paradigm shift. Chip manufacturers are shifting development resources away from single- processor chips to a new generation of multi-processor chips, huge clusters of multi-core workstations are easily accessible everywhere, external memory devices, such as hard disks or solid state disks, are getting more powerful both in terms of capacity and access speed. This fundamental technological shift in core computing architecture will require a fundamental change in how we ensure the quality of software. The key issue is that verification techniques need to undergo a similarly deep technological transition to catch up with the complexity of software designed for the new hardware. In this position paper we would like to advocate the necessity of fully exploiting the power offered by the new computer hardware to make the verification techniques capable of handling next-generation software.
ER -
BARNAT, Jiří and Luboš BRIM. Squeeze All the Power Out of Your Hardware to Verify Your Software! In \textit{Leveraging Applications of Formal Methods, Verification and Validation}. Berlin Heidelberg: Springer, 2008, p.~604-618. ISBN~978-3-540-88478-1.
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