BARNAT, Jiří, Petr BAUCH, Luboš BRIM and Milan ČEŠKA. Employing Multiple CUDA Devices to Accelerate LTL Model Checking. In Proceedings of 16th International Conference on Parallel and Distributed Systems (ICPADS 2010). Neuveden: IEEE Computer Society, 2010, p. 259-266. ISBN 978-0-7695-4307-9.
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Basic information
Original name Employing Multiple CUDA Devices to Accelerate LTL Model Checking
Authors BARNAT, Jiří (203 Czech Republic, guarantor, belonging to the institution), Petr BAUCH (203 Czech Republic, belonging to the institution), Luboš BRIM (203 Czech Republic, belonging to the institution) and Milan ČEŠKA (203 Czech Republic, belonging to the institution).
Edition Neuveden, Proceedings of 16th International Conference on Parallel and Distributed Systems (ICPADS 2010), p. 259-266, 8 pp. 2010.
Publisher IEEE Computer Society
Other information
Original language English
Type of outcome Proceedings paper
Field of Study 10201 Computer sciences, information science, bioinformatics
Country of publisher United States of America
Confidentiality degree is not subject to a state or trade secret
RIV identification code RIV/00216224:14330/10:00049648
Organization unit Faculty of Informatics
ISBN 978-0-7695-4307-9
ISSN 1521-9097
Keywords in English Model Checking; Linear Temporal Logic; Multiple CUDA devices
Tags International impact, Reviewed
Changed by Changed by: RNDr. Pavel Šmerk, Ph.D., učo 3880. Changed: 13/4/2012 12:57.
Abstract
Recently, the CUDA technology has been used to accelerate many computation demanding tasks. For example, in~\cite{BBCL09} we have shown how CUDA technology can be employed to accelerate the process of Linear Temporal Logic (LTL) Model Checking. While the raw computing power of a CUDA enabled device is tremendous, the applicability of the technology is quite often limited to small or middle-sized instances of the problems being solved. This is because the memory that a single device is equipped with, is simply not large enough to cope with large or realistic instances of the problem, which is also the case of our CUDA-aware LTL Model Checking solution. In this paper we suggest how to overcome this limitations by employing multiple (two in our case) CUDA devices for acceleration of our fine-grained communication-intensive parallel algorithm for LTL Model Checking.
Links
GA201/09/1389, research and development projectName: Verifikace a analýza velmi velkých počítačových systémů
Investor: Czech Science Foundation, Verification and Analysis of Large-Scale Computer Systems
GD102/09/H042, research and development projectName: Matematické a inženýrské metody pro vývoj spolehlivých a bezpečných paralelních a distribuovaných počítačových systémů
Investor: Czech Science Foundation
GP201/09/P497, research and development projectName: Automatizovaná formální verifikace s využitím soudobého hardware
Investor: Czech Science Foundation, Automated formal verification using modern hardware
MSM0021622419, plan (intention)Name: Vysoce paralelní a distribuované výpočetní systémy
Investor: Ministry of Education, Youth and Sports of the CR, Highly Parallel and Distributed Computing Systems
MUNI/A/0914/2009, interní kód MUName: Rozsáhlé výpočetní systémy: modely, aplikace a verifikace (Acronym: SV-FI MAV)
Investor: Masaryk University, Category A
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