{
    "irqs": [
        "nvic_wwdg", 
        "pvd", 
        "tamp_stamp", 
        "rtc_wkup", 
        "flash", 
        "rcc", 
        "exti0", 
        "exti1", 
        "exti2_tsc", 
        "exti3", 
        "exti4", 
        "dma1_channel1", 
        "dma1_channel2", 
        "dma1_channel3", 
        "dma1_channel4", 
        "dma1_channel5", 
        "dma1_channel6", 
        "dma1_channel7", 
        "adc1_2", 
        "usb_hp_can1_tx", 
        "usb_lp_can1_rx0", 
        "can1_rx1", 
        "can1_sce", 
        "exti9_5", 
        "tim1_brk_tim15", 
        "tim1_up_tim16", 
        "tim1_trg_com_tim17", 
        "tim1_cc", 
        "tim2", 
        "tim3", 
        "tim4", 
        "i2c1_ev_exti23", 
        "i2c1_er", 
        "i2c2_ev_exti24", 
        "i2c2_er", 
        "spi1", 
        "spi2", 
        "usart1_exti25", 
        "usart2_exti26", 
        "usart3_exti28", 
        "exti15_10", 
        "rtc_alarm", 
        "usb_wkup_a", 
        "tim8_brk", 
        "tim8_up", 
        "tim8_trg_com", 
        "tim8_cc", 
        "adc3", 
        "reserved_1", 
        "reserved_2", 
        "reserved_3", 
        "spi3", 
        "uart4_exti34", 
        "uart5_exti35", 
        "tim6_dac", 
        "tim7", 
        "dma2_channel1", 
        "dma2_channel2", 
        "dma2_channel3", 
        "dma2_channel4", 
        "dma2_channel5", 
        "eth", 
        "reserved_4", 
        "reserved_5", 
        "comp123", 
        "comp456", 
        "comp7", 
        "hrtim_master", 
        "hrtim_tima", 
        "hrtim_timb", 
        "hrtim_timc", 
        "hrtim_timd", 
        "hrtim_time", 
        "hrtim_flt", 
        "usb_hp", 
        "usb_lp", 
        "usb_wkup", 
        "reserved_13", 
        "reserved_14", 
        "reserved_15", 
        "reserved_16"
    ], 
    "partname_humanreadable": "STM32 F3 series", 
    "partname_doxygen": "STM32F3", 
    "includeguard": "LIBOPENCM3_STM32_F3_NVIC_H"
}
