PV199 FPGA Applications

Faculty of Informatics
Autumn 2008
Extent and Intensity
2/0/1. 4 credit(s) (plus extra credits for completion). Recommended Type of Completion: k (colloquium). Other types of completion: zk (examination), z (credit).
Teacher(s)
RNDr. Vojtěch Krmíček, Ph.D. (lecturer)
Mgr. Šimon Řeřucha, Ph.D. (lecturer)
Ing. Zbyněk Bureš, Ph.D. (assistant)
Guaranteed by
prof. Ing. Václav Přenosil, CSc.
Department of Machine Learning and Data Processing – Faculty of Informatics
Contact Person: prof. Ing. Václav Přenosil, CSc.
Timetable
Wed 16:00–17:50 B202
Prerequisites
Courses PA174 - Design of Digital Computersis and PA176 - Digital Computers Architecture are advisable source of necessary knowledges for current course.
Course Enrolment Limitations
The course is also offered to the students of the fields other than those the course is directly associated with.
The capacity limit for the course is 20 student(s).
Current registration and enrolment status: enrolled: 0/20, only registered: 0/20, only registered with preference (fields directly associated with the programme): 0/20
fields of study / plans the course is directly associated with
there are 33 fields of study the course is directly associated with, display
Course objectives
Main aim of this courese is understand hardware, structure and application of the FPGAs. The lessons are specialized in particular into following topics:
hardware and structure of the FPGAs
methodology of the hardware design
time analyse, modelling and simulation of the hardware design
IP cores application
Debugging of the hardware design.
Syllabus
  • Introduction to VHDL and Verilog.
  • Incremental compilation
  • Timing analysis
  • RTL viewer
  • Optimization
  • Embedded multiplier block
  • Chip editor
  • Design space explorer
  • In system memory editor
  • SignaltapII
  • Logic analyzer interface
  • Snapshot on NIOSII.
Literature
  • Volnei A. Pedrone: Circuit Design with VHDL. London 2004
  • Douglas L.Perry: Programig by Example, Mc Graw-Hill, NY 2005
  • Petr J. Ashenden: The Designer's Guide to VHDL
Assessment methods
Final examination consist from defence of the:
- set of tasks submitted during semester,
- final project.
Language of instruction
Czech
Follow-Up Courses
Further comments (probably available only in Czech)
Study Materials
The course is taught annually.
The course is also listed under the following terms Autumn 2007.
  • Enrolment Statistics (recent)
  • Permalink: https://is.muni.cz/course/fi/autumn2008/PV199