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@inproceedings{1577797,
author = {Ročkai, Petr and Barnat, Jiří},
address = {Scham},
booktitle = {24th International Conference on Formal Methods for Industrial Critical Systems, FMICS 2019},
doi = {http://dx.doi.org/10.1007/978-3-030-27008-7_8},
editor = {K. G. Larsen, T. Willemse},
keywords = {simulator; LLVM; verification; counterexample},
howpublished = {tištěná verze "print"},
language = {eng},
location = {Scham},
isbn = {978-3-030-27007-0},
pages = {127-142},
publisher = {Springer Verlag},
title = {A Simulator for LLVM Bitcode},
url = {https://link.springer.com/chapter/10.1007%2F978-3-030-27008-7_8},
year = {2019}
}
TY - JOUR
ID - 1577797
AU - Ročkai, Petr - Barnat, Jiří
PY - 2019
TI - A Simulator for LLVM Bitcode
PB - Springer Verlag
CY - Scham
SN - 9783030270070
KW - simulator
KW - LLVM
KW - verification
KW - counterexample
UR - https://link.springer.com/chapter/10.1007%2F978-3-030-27008-7_8
N2 - In this paper, we introduce an interactive simulator for programs in the form of LLVM bitcode. The main features of the simulator include precise control over thread scheduling, automatic checkpoints and reverse stepping, support for source-level information about functions and variables in C and C++ programs and structured heap visualisation. Additionally, the simulator is compatible with DiVM (DIVINE VM) hypercalls, which makes it possible to load, simulate and analyse counterexamples from an existing model checker.
ER -
ROČKAI, Petr a Jiří BARNAT. A Simulator for LLVM Bitcode. In K. G. Larsen, T. Willemse. \textit{24th International Conference on Formal Methods for Industrial Critical Systems, FMICS 2019}. Scham: Springer Verlag, 2019, s.~127-142. ISBN~978-3-030-27007-0. Dostupné z: https://dx.doi.org/10.1007/978-3-030-27008-7\_{}8.
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