Project of IPv6 Router with FPGA Hardware Accelerator

NOVOTNÝ, Jiří, Otto FUČÍK and David ANTOŠ. Project of IPv6 Router with FPGA Hardware Accelerator. In Field-Programmable Logic and Applications, 13th International Conference FPL 2003, Proceedings. Lisbon, Portugal: Springer Verlag, 2003, p. 964-967. ISBN 3-540-40822-3.

Basic information

Original name

Project of IPv6 Router with FPGA Hardware Accelerator

Authors

NOVOTNÝ, Jiří (203 Czech Republic, guarantor), Otto FUČÍK (203 Czech Republic) and David ANTOŠ (203 Czech Republic)

Edition

Lisbon, Portugal, Field-Programmable Logic and Applications, 13th International Conference FPL 2003, Proceedings, p. 964-967, 4 pp. 2003

Publisher

Springer Verlag

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Other information

Language

English

Type of outcome

Stať ve sborníku

Field of Study

20206 Computer hardware and architecture

Country of publisher

Czech Republic

Confidentiality degree

není předmětem státního či obchodního tajemství

RIV identification code

RIV/00216224:14610/03:00008872

Organization unit

Institute of Computer Science

ISBN

3-540-40822-3

UT WoS

000186329700096

Keywords in English

IPv6; Liberouter; router; Virtex II; FPGA

Tags

FPGA, IPv6, liberouter, router, Virtex II

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Abstract

V originále

This paper deals with a hardware accelerator as a part of the Liberouter project which is focused on design and implementation of a PC based IPv6 router. Major part of the Liberouter project is the development of a hardware accelerator---the PCI board called Combo6 and its FPGA design which allows processing most of network traffic in hardware.

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Links

MSM 000000001, plan (intention)

Name: Vysokorychlostní síť národního výzkumu a její nové aplikace