Secure hardware devices typically provide only a narrow set of operations that can be accelerated by built-in coprocessors. As cryptographic protocol designs rarely consider these constraints, their applicability to such devices is often limited. This thesis aims to address the problem by proposing a variant of the Schnorr multi-signature protocol that can be efficiently executed on a common type of secure hardware, namely smart cards.

• Study of state-of-the-art designs of Schnorr multi-signature schemes and approaches to their security proofs.
• Design of a modification of a selected Schnorr multi-signature scheme that avoids point addition on smart cards.
• Attempt to conduct a security proof of the scheme.
• Implement the scheme on the JavaCard platform and demonstrate successful signing with two parties.
• Evaluate the performance of the implementation.