Physical security threats appear at the chip level, where an attacker can measure or physically influence a cryptographic operation performed by the chip's circuit. The side-channel analysis exploits additional sources of information (called physical observations), including timing, power consumption, or electromagnetic emissions (EM), among others. Malicious data modifications can be caused by fault injection, which can be performed using optical, electromagnetic, power, and clock glitches. These attacks seriously threaten modern cryptographic implementations, including recently developed isogeny-based post-quantum schemes. 

In this project, the student analyzes the practicality of fault injections on one of the building blocks of isogeny-based cryptography: chains of isogenies. First, the student defines a theoretical model related to the strength of different attacker models and then analyzes the practical security of these building blocks concerning these attacker models.

The model consists of 2 categories of dummy operations:

• the first category consists of dummy operations that are only
  additional operations added to make things constant-time; 
• the second category consists of dummy operations that cancel each
  other out; 
• Optionally, a protected implementation may be considered.

This work reproduces and tries to potentially extend the work from "Trouble at the CSIDH: Protecting CSIDH with Dummy-Operations against Fault Injection Attacks" (see https://eprint.iacr.org/2020/1005).

The attack will be performed using ChipWhisperer Lite ARM and Husky targets:

• https://www.newae.com/products/nae-cwlite-arm
• https://rtfm.newae.com/Capture/ChipWhisperer-Husky/

The division of the tasks within the projects is approximately: 30% programming, 30% literature study, 40% lab work.